555

Do you mean the 555 timer IC? If yes, here’s a compact exam-ready quick reference.

Pinout (DIP)

• 1 = GND
• 2 = Trigger (active low)
• 3 = Output
• 4 = Reset (active low)
• 5 = Control Voltage
• 6 = Threshold
• 7 = Discharge
• 8 = Vcc

Modes and basic formulas

1. Astable (free-running)

• Connections: R1 between Vcc and Discharge (pin 7); R2 between Discharge and Threshold/Trigger (pins 6/2); C from Threshold to ground.
• Timing:
  • t_high = 0.693 × (R1 + R2) × C
  • t_low = 0.693 × R2 × C
  • Period T = t_high + t_low
  • Frequency f ≈ 1 / [0.693 × (R1 + 2R2) × C]
  • Duty cycle D = t_high / (t_high + t_low) = (R1 + R2) / (R1 + 2R2)
• Notes: Increasing R1 increases both T_high and the duty cycle; R2 mainly affects T_low.

2. Monostable (one-shot)

• Trigger on pin 2 goes below ~1/3 Vcc; output goes high for a period, then returns low.
• Timing: t ≈ 1.1 × R × C
  • Typical arrangement: R from Vcc to Discharge (pin 7), C from Threshold/Trigger to ground.
• Reset (pin 4) must be held high to enable operation.

3. General notes

• Threshold (pin 6) and Trigger (pin 2) thresholds: 1/3 Vcc for trigger, 2/3 Vcc for threshold.
• Reset (pin 4): keep high (often tied to Vcc via resistor); pulling low forces output low.
• Control voltage (pin 5): typically decoupled with a 0.01 µF cap to ground to reduce noise; used to shift 2/3 Vcc reference if needed.
• Supply range: Typically 4.5–16 V (some CMOS variants extend higher or lower).
• Output drive: About ±200 mA peak (varies by variant); not a heavy load driver—use a transistor if needed.
• Variants: 7555, LMC555 are low-power CMOS versions with similar functionality but different electrical characteristics.

Common circuit notes

• If you need near 50% duty cycle, you can add a diode in parallel with R2 in an astable to separate charge/discharge paths (or choose a CMOS 555 variant or discrete PWM approach).
• Large C on control pin (pin 5) is generally avoided; use a small cap (0.01 µF) as recommended.

Quick practice problems

• Example 1 (Astable): R1 = 1 kΩ, R2 = 10 kΩ, C = 100 nF. Calculate t_high, t_low, f, and duty cycle.
  • t_high ≈ 0.693 × (1k + 10k) × 100 nF ≈ 0.000762 s
  • t_low ≈ 0.693 × 10k × 100 nF ≈ 0.000693 s
  • T ≈ 0.001455 s; f ≈ 687 Hz; D ≈ 0.523 (52.3%)
• Example 2 (Monostable): R = 47 kΩ, C = 100 nF. What is t?
  • t ≈ 1.1 × 47k × 100 nF ≈ 5.17 ms
• Example 3: Why would you add a diode in parallel with R2 in an astable circuit?
  • To separate the charge and discharge paths so t_high and t_low can be set independently, enabling a duty cycle closer to 50% or other desired values.
• Example 4: What happens if you pull pin 4 (Reset) low?
  • Output is forced low, regardless of Trigger/Threshold.

Would you like a specific checklist or a few more tailored practice questions for your course? Or should I assume you meant the 555 timer IC and tailor to a particular exam topic (e.g., PWM, astable, monostable, TTL/CMOS variants)?