Do you mean the 555 timer IC? Here’s a quick, exam-friendly refresher you can use.
Key pins (DIP-8)
- 1 GND
- 2 Trigger
- 3 Output
- 4 Reset
- 5 Control Voltage
- 6 Threshold
- 7 Discharge
- 8 Vcc
How it works (quick idea)
- The two comparators compare the capacitor voltage to 1/3 Vcc (trigger) and 2/3 Vcc (threshold).
- When trigger < 1/3 Vcc, the output goes high and the discharge transistor is off, allowing the timing capacitor to charge.
- When threshold > 2/3 Vcc, the output goes low and the discharge transistor turns on to discharge the capacitor.
- Reset (pin 4) is active-low; pulling it low forces the output low regardless of inputs.
Two common modes
- Astable (free-running)
- No external trigger needed.
- External components: RA, RB, C.
- Charging path: through RA + RB; discharging path: through RB (to ground via discharge transistor).
- Equations (approx, with Vcc as supply):
- t_high = 0.693 × (RA + RB) × C
- t_low = 0.693 × RB × C
- Period T = t_high + t_low = 0.693 × (RA + 2RB) × C
- Frequency f = 1 / T = 1 / [0.693 × (RA + 2RB) × C]
- Duty cycle = t_high / T = (RA + RB) / (RA + 2RB)
Example: RA = 1 kΩ, RB = 4.7 kΩ, C = 10 nF
- t_high ≈ 0.693 × (1k + 4.7k) × 10nF ≈ 3.95 ms
- t_low ≈ 0.693 × 4.7k × 10nF ≈ 3.26 ms
- T ≈ 7.21 ms, f ≈ 139 Hz
- Duty ≈ (1k + 4.7k) / (1k + 9.4k) ≈ 0.55 (55%)
- Monostable (one-shot)
- Triggered by a negative pulse on pin 2 (below 1/3 Vcc).
- External components: R, C (and often a pull-up or separate wiring).
- Output goes high for a time t ≈ 1.1 × R × C, then returns low.
- After timing out, the capacitor is discharged by the discharge transistor until another trigger.
Example: R = 1 kΩ, C = 1 μF
- t ≈ 1.1 ms
Common pitfalls
- Don’t forget the reset pin (tie to Vcc if unused).
- Control voltage pin (5) is typically left at 2/3 Vcc unless you need to modulate the threshold.
- For astable, choose RA >> RB to avoid too-short t_high; but not so large that noise triggers misbehavior.
- Decoupling capacitor close to Vcc and GND near the IC helps with stability.
Quick practice questions
- Design a 555 astable with f ≈ 1 kHz and a duty cycle around 60%. Pick reasonable values for RA, RB, C and show the calculations.
- If you need a 2 ms trigger pulse, choose R and C for a monostable configuration to achieve t ≈ 2 ms. Show the math.
If you want, tell me your target mode (astable or monostable), desired frequency or pulse width, and supply voltage. I can tailor the component values and run through the exact calculations for your exam.