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Задача Задача №3621672
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18 июня 2026 04:40 · публичный вопрос
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Аноним

555

Нейросеть18 июня 2026 04:40

Nice—555 timer is a classic exam topic. Here’s a compact refresher plus quick practice problems.

What the 555 is (brief)

  • Pinout (common single 555 in NE/µA style): 1 GND, 2 Trigger, 3 Output, 4 Reset (active low), 5 Control (CV, often with 0.01 µF to ground), 6 Threshold, 7 Discharge, 8 Vcc.
  • Core idea: Two comparators feed a flip-flop; output state changes when trigger/threshold cross 1/3 Vcc and 2/3 Vcc; discharge transistor at pin 7 is used to charge/discharge the timing capacitor.

Two common configurations

  1. Astable (oscillator, no external trigger)
  • Purpose: free-running square wave.
  • Key equations:
    • t_high = 0.693 × (RA + RB) × C
    • t_low = 0.693 × RB × C
    • f ≈ 1 / [0.693 × (RA + 2RB) × C]
    • Duty cycle = t_high / (t_high + t_low) = (RA + RB) / (RA + 2RB)
  • How to read RA and RB: RA is the resistor from Vcc to the discharge node, RB is from discharge node to the timing capacitor (C), which goes to ground.
  1. Monostable (one-shot)
  • Purpose: output goes high for a fixed time after a trigger.
  • Key equation:
    • t = 1.1 × R × C
  • How to choose R and C: R is the resistor charging the timing capacitor C, from Vcc toward the capacitor. Adjust R or C to set the pulse width.

Notes and tips

  • Reset pin (4) should be tied to Vcc if you’re not using it as a reset input.
  • Control voltage pin (5) can modulate the threshold (2/3 Vcc) and trigger (1/3 Vcc); for basic designs you’ll tie 5 to ground with a small decoupling cap.
  • Supply range and drive: typical Vcc 4.5–16 V; output can drive tens to a few hundred mA (check datasheet) but best to design with some headroom.
  • Add decoupling (e.g., 0.01 µF to 0.1 µF) near pin 8/5 to reduce noise and jitter.

Two quick practice problems

Problem A (Astable)

  • Given: RA = 1 kΩ, RB = 10 kΩ, C = 100 nF.
  • Find: f, t_high, t_low, and duty cycle.
  • Solution:
    • t_high = 0.693 × (RA + RB) × C = 0.693 × (1k + 10k) × 100 nF = 0.693 × 11k × 100e-9 ≈ 0.762 ms
    • t_low = 0.693 × RB × C = 0.693 × 10k × 100 nF ≈ 0.693 ms
    • f ≈ 1 / (t_high + t_low) ≈ 1 / 1.455 ms ≈ 688 Hz
    • Duty cycle ≈ t_high / (t_high + t_low) ≈ 0.762 / 1.455 ≈ 52%

Problem B (Monostable)

  • Given: R = 47 kΩ, C = 1 µF.
  • Find: Pulse width t.
  • Solution:
    • t ≈ 1.1 × R × C = 1.1 × 47k × 1 µF ≈ 1.1 × 0.047 s ≈ 0.0517 s ≈ 51.7 ms

If you want, I can:

  • Create more practice problems (varying RA/RB, C values; different target frequencies).
  • Add timing diagrams or step-by-step truth table reasoning.
  • Help you design a specific circuit (e.g., blink LED at a given rate, debounce switch, etc.).

Would you like more problems, or should I tailor this to a specific course topic (analog electronics, digital design, lab, etc.)?

555
Nice—555 timer is a classic exam topic. Here’s a compact refresher plus quick practice problems. What the 555 is (brief) - Pinout (common single 555 in NE/µA style): 1 GND, 2 Trigger, 3 Output, 4 Reset (active low), 5 Control (CV, often with 0.01 µF to ground), 6 Threshold, 7 Discharge, 8 Vcc. - Core idea: Two comparators feed a flip-flop; output state changes when trigger/threshold cross 1/3 Vcc and 2/3 Vcc; discharge transistor at pin 7 is used to charge/discharge the timing capacitor. Two common configurations 1) Astable (oscillator, no external trigger) - Purpose: free-running square wave. - Key equations: - t_high = 0.693 × (RA + RB) × C - t_low = 0.693 × RB × C - f ≈ 1 / [0.693 × (RA + 2RB) × C] - Duty cycle = t_high / (t_high + t_low) = (RA + RB) / (RA + 2RB) - How to read RA and RB: RA is the resistor from Vcc to the discharge node, RB is from discharge node to the timing capacitor (C), which goes to ground. 2) Monostable (one-shot) - Purpose: output goes high for a fixed time after a trigger. - Key equation: - t = 1.1 × R × C - How to choose R and C: R is the resistor charging the timing capacitor C, from Vcc toward the capacitor. Adjust R or C to set the pulse width. Notes and tips - Reset pin (4) should be tied to Vcc if you’re not using it as a reset input. - Control voltage pin (5) can modulate the threshold (2/3 Vcc) and trigger (1/3 Vcc); for basic designs you’ll tie 5 to ground with a small decoupling cap. - Supply range and drive: typical Vcc 4.5–16 V; output can drive tens to a few hundred mA (check datasheet) but best to design with some headroom. - Add decoupling (e.g., 0.01 µF to 0.1 µF) near pin 8/5 to reduce noise and jitter. Two quick practice problems Problem A (Astable) - Given: RA = 1 kΩ, RB = 10 kΩ, C = 100 nF. - Find: f, t_high, t_low, and duty cycle. - Solution: - t_high = 0.693 × (RA + RB) × C = 0.693 × (1k + 10k) × 100 nF = 0.693 × 11k × 100e-9 ≈ 0.762 ms - t_low = 0.693 × RB × C = 0.693 × 10k × 100 nF ≈ 0.693 ms - f ≈ 1 / (t_high + t_low) ≈ 1 / 1.455 ms ≈ 688 Hz - Duty cycle ≈ t_high / (t_high + t_low) ≈ 0.762 / 1.455 ≈ 52% Problem B (Monostable) - Given: R = 47 kΩ, C = 1 µF. - Find: Pulse width t. - Solution: - t ≈ 1.1 × R × C = 1.1 × 47k × 1 µF ≈ 1.1 × 0.047 s ≈ 0.0517 s ≈ 51.7 ms If you want, I can: - Create more practice problems (varying RA/RB, C values; different target frequencies). - Add timing diagrams or step-by-step truth table reasoning. - Help you design a specific circuit (e.g., blink LED at a given rate, debounce switch, etc.). Would you like more problems, or should I tailor this to a specific course topic (analog electronics, digital design, lab, etc.)?