555

Do you mean the 555 timer IC? If so, here’s a quick refresher for exam prep. If you meant something else by "555," tell me.

Key facts

• Pinout (NE/SE555 standard): 1 GND, 2 Trigger, 3 Output, 4 Reset, 5 Control Voltage, 6 Threshold, 7 Discharge, 8 Vcc
• Modes:
  • Astable (free-running oscillator)
    • t_high = 0.693 (RA + RB) C
    • t_low = 0.693 RB C
    • Frequency: f = 1.44 / ((RA + 2 RB) C)
    • Duty cycle: D = (RA + RB) / (RA + 2 RB)
  • Monostable (one-shot)
    • Pulse width: t = 1.1 R C
    • Triggered by a negative pulse on pin 2; output goes high for t
  • Bistable (latch) mode (less common in coursework)
    • No RC timing network; output toggles with trigger (set) and reset inputs
• Typical specs
  • Supply: about 4.5 V to 15 V (varies by package)
  • Reset pin (4) should be tied to Vcc if not used
  • Control voltage pin (5) can have a small cap (e.g., 0.01 µF) to reduce noise
  • Output can source/sink tens to ~200 mA depending on variant
• Practical tips
  • To get near 50% duty cycle in astable, you often need a diode or two resistors to separate charge/discharge paths
  • For precision timing, use a CMOS variant (e.g., 7555 or LMC555) for lower power/noise
  • Common mistakes: forgetting to pull Reset high, incorrect RC connections, disregarding control voltage pin

If you want, I can walk through a sample problem (e.g., designing an astable with f = 1 kHz and C = 100 nF) or cover bistable operation. What would you like to work on?